16-bit fixed-point DSP with 80 kB single-cycle RAM
The ADSP-2181BSZ-133 is a 16-bit fixed-point DSP from the ADSP-21xx family, clocked at 33.3 MHz. Its 80 kB of on-chip RAM is split between program and data memory, both accessible in a single cycle — no wait-state penalty for tight filter loops or FFT butterflies. Both the core and I/O run from a single 5.00 V rail, eliminating the need for a separate level translator. The Synchronous Serial Port (SSP) handles codec or serial ADC interfaces directly.
Industrial temperature range, legacy PQFP footprint
The 128-PQFP (28x28 mm) body uses a 0.635 mm pitch, typical for mid-90s DSP layouts; rework requires a preheat profile that avoids warping the large epoxy body. Non-volatile memory is external — the DSP boots from a separate serial or parallel flash. The 128-BQFP package has no exposed pad; decoupling should follow the datasheet's recommended layout to keep core noise below the 5 V rail tolerance.
Active lifecycle — no LTB, but monitor the 5V DSP market
That said, 5 V fixed-point DSPs are a shrinking segment — most new designs have migrated to 3.3 V or lower. If this part is in a production BOM, securing a buffer lot or qualifying a voltage-translated alternative may be prudent before the supply tightens.
Sourced to order through independent distribution; availability and current pricing confirmed at RFQ. The part is ROHS3 compliant — no RoHS exemption expiry to track for the 5 V process.
