Four-channel simultaneous-sampling ADC at 65 MSPS
The AD9228ABCPZ-65 packs four 12-bit pipelined ADC cores on one die, each sampling simultaneously at 65 MSPS. That means a single device captures four phase-coherent analog channels — think I/Q baseband pairs, multi-element ultrasound arrays, or phased-array radar receivers — without the inter-channel skew you get from multiplexing a single converter. The pipelined architecture delivers a 1:1 S/H-to-ADC ratio per channel, so each input path has its own track-and-hold front end. No shared sampling capacitor means the full-scale step response on one channel doesn't bleed into the adjacent channel's conversion window.
Input flexibility and interface choice
Each of the four inputs accepts either a differential or single-ended signal. Differential drive gives you the best common-mode rejection and full-scale range, while single-ended mode simplifies the front end when the source is already ground-referenced — for example, a single-ended IF output from a mixer that doesn't justify a balun per channel. The digital output is LVDS serial on a single 1.8 V supply rail shared by the analog and digital domains. The internal reference eliminates the need for an external voltage source; the reference buffer drives all four ADC cores. If you need a different span, the reference can be overdriven externally, but for most applications the internal 1 V p-p full-scale works without extra components.
Package, temperature grade, and board integration
The datasheet's recommended footprint uses a 5x5 via grid with 0.3 mm finished hole diameter — skip the thermal relief on the pad connection for best thermal and electrical performance. The industrial temperature grade also means the part is characterized over the full range — no parametric surprises at the cold or hot end.