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Analog Devices AD7545LP — Discrete Semiconductors

AD7545LP 12-bit Multiplying DAC, PLCC-20, Parallel Input

MPNAD7545LP
End of Life

Analog Devices AD7545LP, 12-bit multiplying DAC, R-2R architecture, current-unbuffered output, parallel data interface, 2µs settling time, 20-PLCC (J-Lead) package, Bulk.

$15.6Ref. price · indicative, final on quote
Packaging20-LCC (J-Lead)
RoHSRoHS non-compliant
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

AD7545LP specifications
ParameterValue
Output typeCurrent - Unbuffered
MountingSurface Mount
Reference typeExternal
Voltage - supply, analog4.75V ~ 15.25V
Voltage - supply, digital4.75V ~ 15.25V
InterfaceParallel
Operating temperature0°C ~ 70°C
PackageBulk
ArchitectureMultiplying DAC, R-2R
INL (DNL)±0.5 (Max), ±1 (Max)
Settling time2µs
Number of bits12
Case20-LCC (J-Lead)
Differential outputNo
Number of d (A converters)1

Product details

The AD7545LP is a 12-bit multiplying DAC from Analog Devices, built on a CMOS R-2R ladder architecture with current-unbuffered output. It accepts parallel digital input data and settles to within 0.5 LSB in 2 µs typical. The reference type is external, and the analog and digital supply rails share a common 4.75 V to 15.25 V range — a single supply rail can power both sides, simplifying the board-level power distribution. Housed in a 20-lead PLCC (J-Lead) package with a 9x9 mm body, the device is intended for surface-mount assembly.

Linearity and settling performance

Integral non-linearity is ±0.5 LSB maximum, and differential non-linearity is ±1 LSB maximum — the INL spec means the transfer function stays within half an LSB of an ideal straight line across all 4096 codes, which is tight enough for most 12-bit control-loop and waveform-generation applications without software calibration. The 2 µs settling time to ±0.5 LSB sets the maximum update rate at roughly 500 kHz for a full-scale step. For smaller code changes the settling is faster, but the parallel interface itself can accept data at a higher rate than the DAC can settle — the host must insert wait states or use a handshake if the application requires code-to-code updates faster than the settling window.

Lifecycle and compliance reality

RoHS compliance is not claimed for this order code — the part is marked RoHS non-compliant. Buyers with RoHS-required BOM lines should verify the exemption or plan for a leaded-process assembly step.

Sourcing and cross-reference fit

The AD7545LP is sourced to order through independent distribution channels. The key difference is package and supply format: the AD7545LP comes in a 20-PLCC (J-Lead) in bulk tubes, while the AD7545AKRZ-REEL7 is a 20-SOIC wide-body on tape-and-reel. The PLCC footprint does not drop into a SOIC land pattern — a board layout change is required to swap between them.

Frequently asked questions

Will AD7545LP drop into a board designed for AD7545AKRZ-REEL7?

No. The AD7545LP uses a 20-PLCC (J-Lead) footprint, while the AD7545AKRZ-REEL7 is a 20-SOIC wide-body. The pin spacing and package outline differ — a board layout change is required to swap between them. Electrically they are near-identical in resolution, architecture, and linearity.

How can I order AD7545LP or check availability?

The AD7545LP is sourced to order through independent distribution. No stock-holding or lead-time number is published here.