14 ns propagation delay — what it means for the bus
Maximum propagation delay is 14 ns at 6V with a 50 pF load.
Logic levels and input thresholds
Low-level input threshold is 0.5V to 1.8V; high-level is 1.7V to 4.8V, depending on supply. At 5V, a typical low is below 1.5V and a high above 3.5V — compatible with 3.3V CMOS logic driving the input. No Schmitt-trigger hysteresis, so the input must transition cleanly; a slow edge on a long trace may cause oscillation. For noisy environments, the SN74HCS04PWR adds Schmitt-trigger inputs but runs at a slightly slower 16 ns delay.
Temperature grade and environment
Rated for -40°C to 85°C. The 14-TSSOP body is 4.40 mm wide.
