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STMicroelectronics M24C01-RDS6TG — Memory (DRAM / SRAM / Flash / EEPROM)

ST M24C01-RDS6TG 1Kbit I²C EEPROM, 8-MSOP, EOL/Hot

MPNM24C01-RDS6TG
Obsolete

STMicroelectronics M24C01-RDS6TG is a 1Kbit I²C serial EEPROM in 8-MSOP (3.00 mm width), operating from 1.8V to 5.5V with a 400 kHz I²C interface, 900 ns access time, 5ms write-cycle, rated −40°C to 85°C, supplied on tape and reel. Marked EOL/Hot — see sourcing posture and pin-compatible alternatives below.

$0.2542Ref. price · indicative, final on quote
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

M24C01-RDS6TG Technical Specifications
ParameterValue
Memory typeNon-Volatile
Mounting typeSurface Mount
Voltage1.8V ~ 5.5V
Frequency400 kHz
Memory interfaceI²C
Operating temperature-40°C ~ 85°C (TA)
PackageTape & Reel (TR)
TechnologyEEPROM
Access time900 ns
Memory size1Kbit
Memory formatEEPROM
Case8-TSSOP, 8-MSOP (0.118\", 3.00mm Width)
Memory organization128 x 8
Write cycle time - word, page5ms

Frequently asked questions

Does the 1.8V–5.5V supply range and 400 kHz I²C clock work on a standard 3.3V industrial bus at 100 kHz?

Yes. The supply range comfortably covers 3.3V rails. At 400 kHz maximum clock the part exceeds the 100 kHz pullup budget of a typical Siemens S7-1200 I²C expansion bus — the interface is fully compatible at 100 kHz. No special pull-up sizing is required for the slower standard speed.

Does page-write mode batch my 30 parameter bytes into one 5ms cycle?

For a 128-byte array the full device fits within one page-write boundary. Starting a page-write at any address within the array and writing up to the full 128 bytes stays within the page boundary, completing in a single 5ms cycle. Writes that cross the array boundary will wrap and corrupt data — firmware should ensure the starting address plus byte count does not exceed 128.