Active production, high-speed 2Mx36 SRAM
The R1QHA7236ABG-25IA0 is a standard SRAM organized as 2Mx36, with a 0.55 ns access time. This is a high-speed synchronous SRAM typically used in networking equipment, test instrumentation, and telecom line cards where deterministic read latency is non-negotiable.
0.55 ns access time — timing margin context
The 0.55 ns access time means the data appears at the output pins within 550 ps of the address being valid. At a 250 MHz clock rate (4 ns period), this leaves over 3 ns of setup margin for the downstream logic or FPGA — comfortable for most designs, but the actual margin shrinks with the output load capacitance and temperature derating. A 2Mx36 organization yields 72 Mbit of total storage — enough for a large look-up table or packet buffer in a 36-bit datapath. The 36-bit width aligns naturally with a 36-bit bus or two 18-bit banks.
Active lifecycle and compliance flag
RoHS non-compliant per the official status — this is a leaded solder process part. For RoHS-exempt applications (military, aerospace, high-reliability industrial) this is the correct version; for lead-free assembly a different suffix or a full RoHS-compliant alternative would be needed.
Bulk package — logistics note
Supplied in Bulk format — loose devices in an anti-static tube or tray, not tape-and-reel. This is typical for engineering samples, low-volume production, or repair stock where pick-and-place reel feeding is not required.