The Renesas 71V416L10PHG is a 4 Mbit asynchronous SRAM organized as 256K x 16 bits, with a 10 ns access time across the full 3 V to 3.6 V supply range. This is a parallel-interface, volatile memory part — no clock, no refresh cycles, just address-to-data valid in 10 ns.
Package and footprint — 44-TSOP II
The 71V416L10PHG ships in a 44-lead TSOP II package (0.400" body width, 10.16 mm). This is a standard JEDEC footprint shared by many mid-density asynchronous SRAMs from Renesas, ISSI, and Cypress.