Synchronous dual-port SRAM for shared-memory datapaths
The Cypress CY7C0851AV-167BBC is a 2 Mbit synchronous dual-port SRAM organized as 64 K words by 36 bits. It runs on a 3.135 V to 3.465 V supply and clocks at 167 MHz over a parallel interface.
At 167 MHz the synchronous ports deliver a no-wait-state access cycle every clock edge. The 64 K x 36 organization means a 36-bit word arrives or departs each cycle.
For industrial motor drives, outdoor base stations, or automotive under-hood applications, the CY7C1011DV33-10BVXI covers -40°C to 85°C but uses an asynchronous interface and a 128 K x 16 organization — a different timing model and a different pinout. The CY7C0851AV-167BBC does not drop into that socket.
