MSP430F67641AIPN 25MHz 16-bit MCU 128KB Flash 8KB RAM
Texas Instruments MSP430F6xx series, 16-bit MSP430 CPUXV2 at 25MHz, 128KB Flash / 8KB RAM, 3×24b sigma-delta ADC plus 8×10b SAR, I²C/SPI/UART, 52 I/O, 80-LQFP (12×12mm), 1.8V–3.6V, -40°C to 85°C. Lifecycle stage: EOL/hot.
- 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
- Date & lot codes on quoteStated per line before you commit; label photos on request.
- MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
- PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.
Specifications
| Parameter | Value |
|---|---|
| Series | MSP430F6xx |
| Mounting type | Surface Mount |
| Oscillator type | Internal |
| Program memory type | FLASH |
| Voltage - supply (Vcc (Vdd)) | 1.8V ~ 3.6V |
| Operating temperature | -40°C~85°C(TA) |
| Speed | 25MHz |
| Package | Tube |
| RAM size | 8K x 8 |
| Core size | 16-Bit |
| Peripherals | Brown-out Detect/Reset, DMA, LCD, POR, PWM, WDT, 3x24b Sigma Delta Converter |
| Connectivity | I²C, IrDA, SPI, UART/USART |
| Number of i (O) | 52 |
| Core processor | MSP430 CPUXV2 |
| Case | 80-LQFP |
| Data converters | A/D 8x10b |
| Program memory size | 128KB (128K x 8) |
Frequently asked questions
Is the MSP430F67641AIPN still available and what does EOL/hot lifecycle stage mean for my order?
The MSP430F67641AIPN carries a lifecycle stage of EOL/hot — TI has declared the part end-of-life but the order channel remains open for last-time-buy coverage. No official successor order code appears in the available ledger; procurement should calculate a lifetime-buy quantity against the installed base on the MRO contract rather than relying on ongoing channel availability. Authenticity screening is recommended given elevated counterfeit risk on EOL mixed-signal MCUs in broker channels.
Is the MSP430F67641AIPN pin-compatible with the MSP430F67641AE or the MSP430F67741AE in 80-LQFP?
Both the MSP430F67641AE and MSP430F67741AE share the same 80-LQFP pinout footprint, but function differences exist in the Port 4 and Port 5 LCD segment driver multiplexing — the part variant letter suffix indicates the specific LCD segment count and port mapping configuration. Layout changes may be required for sigma-delta ADC reference routing on rev-C silicon; TI's errata sheet for the F67641 silicon revision is the authoritative reference, not the distributor record.
Will the 3×24b sigma-delta ADC meet IEC 62056-21 Class B metering accuracy without external op-amp scaling?
The three 24-bit sigma-delta converters provide the resolution and simultaneous-sampling architecture needed for Class B accuracy, but meeting the full IEC 62056-21 Class B error budget depends on the shunt characterisation and calibration routine, not the ADC resolution alone. Full-flash erase cycles during firmware reflash will erase calibration constants stored in flash information memory unless protected — re-characterisation of the current shunt is required after a full erase-cycle reflash if the calibration data is not in protected flash segments.
What is the realistic lead time and minimum order quantity for 25 pieces of MSP430F67641AIPN in tube?
EOL/hot lifecycle stage means lead times on 25-piece quantities can be allocation-constrained or subject to last-time-buy window closures with no firm distributor availability commitment. An RFQ should specify the target quantity and delivery timeline; the tube package is the standard pack format for this variant and is not a special-config option.