120 MHz RXv3 core with 4 MB Flash and 1 MB RAM
The R5F566NNDGFB#30 runs a 32-bit RXv3 core at 120 MHz, backed by 4 MB of on-chip Flash and 1 MB of SRAM — enough headroom for a real-time control stack with a TCP/IP or CANopen protocol layer resident. The 1 MB RAM (organised as 1M x 8) leaves room for large data buffers without external memory. The 32 KB EEPROM section handles calibration constants and boot parameters that survive a firmware update.
Industrial connectivity: Ethernet, CANbus, USB OTG, and 111 I/O
The peripheral set includes Ethernet MAC, CANbus, USB OTG, QSPI, and multiple SCI/SPI/I²C channels. The 111 I/O lines in the 144-LFQFP package give enough pins to drive a local display, read encoder inputs, and talk to a fieldbus gateway without a port expander. The 29-channel 12-bit ADC and dual 12-bit DAC handle analog sensor feedback and setpoint outputs. Compared to the sibling R5F566TAAGFP#30 (160 MHz, 72 I/O, no Ethernet), this part trades 40 MHz of core speed for 39 extra I/O and the Ethernet MAC. The R5F56604DDFP#30 and R5F56604DGFP#30 run at the same 120 MHz but cap at 89 I/O and omit Ethernet and USB OTG. If your BOM needs a single-chip gateway with local sensor acquisition, the R5F566NNDGFB#30 fills that slot without an external PHY or CAN transceiver — the MAC and CAN controller are on-die.
It is ROHS3 compliant.