Device identity and density
The R1LV0408DSP-7LR#B0 is a standard SRAM organized as 512K words by 8 bits, giving a total density of 4 Mbit. The 70 ns access time places it in the moderate-speed class for asynchronous SRAM — suitable for cache, buffer, or lookup-table duty in embedded systems where the bus cycle time is 70 ns or slower.
Supplied in Bulk packaging — tray or tube, not tape-and-reel — which is the typical form for prototype, low-volume, or repair-stock orders.