PLL for Ethernet and SONET/SDH – 644.53125 MHz ceiling
The 82V3911AUG is a single-circuit PLL from Renesas aimed at Ethernet, SONET/SDH, and Stratum timing applications. Its maximum output frequency is 644.53125 MHz.
82V3911AUG Renesas PLL Clock IC – 644.53125 MHz, 196-CABGA
MPN82V3911AUG
End of Life
Renesas Electronics 82V3911AUG, PLL Yes, 9:9 CMOS/LVDS/PECL I/O, 644.53125 MHz max, 196-CABGA (15x15 mm), -40°C to 85°C, tray.
$48.81Ref. price · indicative, final on quote
Packaging196-BGA
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026
Specifications
| Parameter | Value |
|---|---|
| Mounting | Surface Mount |
| Supply voltage | 3.3V |
| Frequency - max | 644.53125MHz |
| Operating temperature | -40°C ~ 85°C |
| PLL | Yes |
| Input | CMOS, LVDS, PECL |
| Output | CMOS, LVDS, PECL |
| Package | Tray |
| Main purpose | Ethernet, SONET/SDH, Stratum |
| Case | 196-BGA |
| Number of circuits | 1 |
| Ratio - Input:Output | 9:9 |
| Differential - Input:Output | Yes/Yes |
Product details
Frequently asked questions
Is the 82V3911AUG compatible with LVDS inputs?
Yes — the input stage accepts CMOS, LVDS, and PECL levels. The same three standards are available on the output. No external level translator is needed when the reference clock is an LVDS oscillator or an FPGA differential output.
What is the frequency range of the 82V3911AUG?
The maximum output frequency is 644.53125 MHz. The datasheet should specify the minimum lock frequency and the loop bandwidth — the evidence does not carry those figures. For Ethernet and SONET/SDH line cards, this ceiling covers 155.52 MHz (OC-3), 622.08 MHz (OC-12), and 156.25 MHz (10GbE reference).