5.2 ns propagation delay — the speed decision
The 74FCT374CTQG: The max propagation delay is 5.2 ns at 5 V supply into a 50 pF load. That sets the upper data-rate ceiling for bus-matching and register applications: with a 5.2 ns clock-to-output delay, the part can comfortably clock at 100 MHz+ in a typical 5 V logic system, but the actual toggle rate at the receiver will be lower once you add trace capacitance and input thresholds. If you are replacing a slower 74FCT part in an existing board, this speed grade keeps the timing margin intact.
Output drive and supply rail
Outputs sink 48 mA and source 15 mA — enough to drive a standard TTL bus or a bank of LEDs through a resistor, but not a heavy capacitive load without a buffer. Quiescent current is 1 mA, which is low enough that a dozen of these on a board won't eat the power budget.
The supplied device package is 20-QSOP, but the part is also listed in a 20-SSOP (0.154-inch wide, 3.90 mm body) — the two are footprint-compatible for rework, though the QSOP has a slightly narrower body width (3.90 mm vs 5.30 mm for standard SSOP). Check your board's land pattern before committing.