Octal transparent latch with 2 ns propagation delay
The 74FCT2373ATQG is an octal D-type transparent latch from Renesas Electronics' 74FCT series, built in fast CMOS. When the latch-enable (LE) input is high, the Q outputs follow the D inputs; when LE goes low, the last data is latched. The tri-state output bus (OE) lets multiple latch banks share a common data bus without contention. Propagation delay is 2 ns typical, which sets the data-to-output latency for address or data latching in high-speed memory and peripheral interfaces. The part is available in a 20-QSOP package (3.90 mm body width), a space-saving alternative to the wider 20-SSOP footprint.
Circuit architecture and output drive
The latch contains eight D-type flip-flops with a common LE and OE, arranged as a single independent circuit (1:1 circuit-to-package ratio). The 8:8 circuit notation means eight inputs map to eight outputs — no muxing or registered feedback on-chip. Output high current is 15 mA; output low current is 12 mA. This asymmetric drive is typical of 5 V CMOS outputs — the high-side PMOS is slightly stronger than the low-side NMOS. For bus loads above 50 pF, the rise/fall time will be dominated by the load capacitance, not the driver.
Sourced through independent distribution channels.