QDR II SRAM — 18 Mbit at 250 MHz
The 71P74604S250BQ is a QDR II (Quad Data Rate) synchronous SRAM from Renesas, organized as 512K x 36 bits for a total of 18 Mbit. It clocks at 250 MHz, delivering a peak bandwidth of 2.25 GB/s on a 36-bit parallel bus — the QDR architecture transfers data on both clock edges, doubling throughput per pin vs standard synchronous SRAM. Access time is 8.4 ns, which sets the window from address latch to valid data out.
Package and board-fit — 165-CABGA
Housed in a 165-ball CABGA (13x15 mm body), the 71P74604S250BQ uses a 1.0 mm ball pitch. The 165-TBGA designation is the same package — TBGA and CABGA are interchangeable here. Supplied in Bulk (trays or tubes), not tape-and-reel — factor this into the pick-and-place feeder setup. The package is RoHS non-compliant, so it is a legacy-alloy (tin-lead) part. For RoHS-exempt or military/aerospace BOMs this is acceptable; for lead-free reflow profiles the solder ball composition may not wet properly at standard lead-free peak temperatures.
Temperature grade and operating range
This limits deployment to indoor, temperature-controlled environments — telecom central offices, data-center line cards, or lab instrumentation. Not suitable for industrial (-40°C to +85°C) or automotive under-hood use without additional thermal management.