Active PCIe reference clock generator — 100 MHz, 1:1 fanout
The 5V41064NLG is an active-production PCI Express (PCIe) clock generator from Renesas, built around a PLL that accepts a clock or crystal input and delivers a single 100 MHz differential output in HCSL or LVDS format.
3.3 V supply, commercial temperature, differential output
Operating from a 3.135 V to 3.465 V rail, the part stays within the standard 3.3 V ±5 % tolerance — the same supply that powers the PCIe root complex or switch ASIC, so no extra regulator is needed. The differential output (No/Yes input-to-output) means the input is single-ended but the output is differential HCSL or LVDS — the common-mode rejection on the PCIe receiver side rejects ground noise picked up between the clock source and the load.
16-VFQFN with exposed pad — board integration note
The supply voltage tolerance is tight enough that a 100 nF ceramic cap at each supply pin, placed within 2 mm of the pin, keeps the high-frequency noise below the PLL's jitter budget.