Clock generator with 2:4 fanout and differential I/O
The 5P49V5901B037NLGI8 is a PLL-based clock generator from the VersaClock® 5 family, accepting HCSL, LVCMOS, LVDS, LVPECL, or crystal inputs and producing HCSL, LVCMOS, LVDS, or LVPECL outputs up to 350 MHz. With a 2:4 input-to-output ratio and differential-capable I/O on both sides, this part serves as a clean clock source for FPGA, SerDes, or Ethernet PHY reference trees where multiple low-jitter copies of a single reference are needed.
