NXP Kinetis KL3 series, MKL36Z256VMC4, 32-bit ARM Cortex-M0+ MCU, 48 MHz, 256 KB Flash, 32 KB RAM, integrated LCD controller and I²S, 84 GPIO, 1.71 V to 3.6 V, -40°C to 105°C, 121-MAPBGA (8×8 mm).
| Parameter | Value |
|---|---|
| Series | Kinetis KL3 |
| Mounting | Surface Mount |
| Oscillator type | Internal |
| Program memory type | FLASH |
| Voltage - supply (Vcc (Vdd)) | 1.71V ~ 3.6V |
| Operating temperature | -40°C ~ 105°C (TA) |
| Speed | 48MHz |
| Package | Tray |
| RAM size | 32K x 8 |
| Core size | 32-Bit Single-Core |
| Peripherals | Brown-out Detect/Reset, DMA, I²S, LCD, LVD, POR, PWM, WDT |
| Connectivity | I²C, LINbus, SPI, UART/USART |
| Number of i (O) | 84 |
| Core processor | ARM® Cortex®-M0+ |
| Case | 121-LFBGA |
| Data converters | A/D - 16bit; D/A - 12bit |
| Program memory size | 256KB (256K x 8) |
256 KB Flash holds a segment LCD frame buffer, a real-time control loop, and moderate sensor-fusion firmware. 32 KB RAM supports a few audio buffers for I²S playback but limits heavy data logging or large GUI frame stores — if the application needs a full VGA frame buffer, step up to the Kinetis KL5 series with more RAM. The Flash is large enough to store a second bootloader for field updates via UART or SPI.
The datasheet is published by NXP under the Kinetis KL3 family documentation. It covers the 48 MHz ARM Cortex-M0+ core, 256 KB Flash, 32 KB RAM, integrated LCD controller, I²S, and all peripherals. The document includes the full electrical characteristics, pinout diagrams, and package dimensions for the 121-MAPBGA.
The MKL36Z256VMC4 doubles the Flash from 128 KB to 256 KB and is pin-compatible with the MKL36Z128VMC4 in the same 121-MAPBGA package. It is a direct drop-in upgrade for firmware that needs more code space or a larger LCD frame buffer.
The core processor is an ARM Cortex-M0+ running at 48 MHz, 32-bit single-core architecture.
The MKL36Z256VMC4 is listed as RoHS compliant. The 121-MAPBGA package is lead-free and meets the RoHS directive requirements for electronic components.