Asymmetric dual-core for real-time and application processing
The NXP MIMXRT1165CVM5A is a 32-bit dual-core microcontroller from the i.MX RT series, pairing an ARM Cortex-M7 core running at 500 MHz with a Cortex-M4 core at 240 MHz. This asymmetric architecture lets the M7 handle application-level tasks — Ethernet stacks, USB host, display pipelines — while the M4 runs deterministic real-time control loops for motor commutation, sensor fusion, or safety monitoring. The part targets industrial gateways, motor drives, and edge compute nodes where a single-chip solution replaces a two-processor BOM.
Connectivity includes CANbus, Ethernet, USB OTG, I²C, SPI, UART/USART, plus audio interfaces (SAI, SPDIF) and external memory bus (EBI/EMI). The MMC/SD/SDIO interface supports boot-from-SD or external storage. On-chip data converters: a pair of 12-bit ADCs and a single 12-bit DAC. External program memory is required — no internal Flash, so the boot path must account for a QSPI NOR or HyperFlash device on the BOM.
Package, supply, and temperature grade
Housed in a 289-ball LFBGA (14x14 mm), surface-mount only. Supply range is 2.4 V to 3.6 V on Vcc/Vdd.