NXP LPC43xx series, LPC43S30FET100K — 32-bit ARM Cortex-M4/M0 dual-core MCU, 204MHz, 264K x 8 SRAM, ROMless, Ethernet/USB OTG/CAN, 49 I/O, 2.2–3.6 V, -40 to 85 °C, 100-TFBGA (9×9mm).
| Parameter | Value |
|---|---|
| Series | LPC43xx |
| Mounting | Surface Mount |
| Oscillator type | Internal |
| Program memory type | ROMless |
| Voltage - supply (Vcc (Vdd)) | 2.2V ~ 3.6V |
| Operating temperature | -40°C~85°C(TA) |
| Speed | 204MHz |
| Package | Tray |
| RAM size | 264K x 8 |
| Core size | 32-Bit Dual-Core |
| Peripherals | Brown-out Detect/Reset, DMA, I²S, POR, WDT |
| Connectivity | CANbus, EBI/EMI, Ethernet, I²C, IrDA, Microwire, SD, SPI, SSI, SSP, UART/USART, USB, USB OTG |
| Number of i (O) | 49 |
| Core processor | ARM® Cortex®-M4/M0 |
| Case | 100-TFBGA |
| Data converters | A/D 4x10b SAR; D/A 1x10b |
Ethernet MAC, USB OTG, and CANbus are all on-chip — this part replaces a separate PHY interface chip in a gateway design. The 49 GPIOs are enough for a local display and keypad alongside the communication ports, but not for a memory-mapped FPGA bus; the EBI/EMI interface is there for external memory or a parallel LCD, not a wide address space.
Supplied in a 100-ball TFBGA (9×9 mm) — surface-mount only. Route the Ethernet and USB differential pairs with controlled impedance.
Yes, the LPC43S30FET100K has no on-chip program memory — it is ROMless. The firmware must reside in external SPI Flash or parallel NOR, booted via the internal boot ROM.
The supply voltage range is 2.2 V to 3.6 V, allowing direct connection to a 3.3 V rail.
Yes, the LPC43S30FET100K includes Ethernet MAC, USB OTG, and CANbus on-chip, along with I²C, SPI, UART, and other serial interfaces.
The maximum clock speed is 204 MHz on the ARM Cortex-M4 core.