32-bit ARM Cortex-M4 microcontroller, 120 MHz core, 512 KB Flash, 96 KB SRAM. LPC40xx series, 144-LQFP package, -40 to 85 °C operating temperature.
120 MHz Cortex-M4 — what it means for throughput
FPU handles single-precision floating-point in hardware.
Memory sizing and field-update reality
512 KB of Flash is the program store; the 96 KB SRAM partitions into a main SRAM block and a separate USB-dedicated buffer. For a typical application — say, an Ethernet-connected sensor gateway with a web server and a 320x240 LCD — the Flash holds the firmware plus a small file system, and the SRAM leaves about 40 KB free for heap and stack after the TCP/IP stack and RTOS kernel are loaded. The 4032 x 8 bytes of EEPROM emulation (simulated in Flash) handles calibration constants and network configuration that survive a power cycle. Field firmware updates are feasible via the USB OTG or Ethernet bootloader, but the 512 KB size means the update image must be compressed or streamed — there is no room for a full dual-bank swap.
