NXP LPC1759FBD80K — ARM Cortex-M3 120MHz MCU, 512KB Flash, 80-LQFP
NXP LPC1759FBD80K, LPC17xx series, ARM Cortex-M3 32-bit single-core at 120MHz, 512KB Flash, 64KB SRAM, 52 I/O, USB OTG/CANbus/SPI/I2C, 2.4–3.6V, -40 to 85°C, 80-LQFP (12x12mm) tray.
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Specifications
| Parameter | Value |
|---|---|
| Series | LPC17xx |
| Mounting type | Surface Mount |
| Oscillator type | Internal |
| Program memory type | FLASH |
| Voltage - supply (Vcc (Vdd)) | 2.4V ~ 3.6V |
| Operating temperature | -40°C~85°C(TA) |
| Speed | 120MHz |
| Package | Tray |
| RAM size | 64K x 8 |
| Core size | 32-Bit Single-Core |
| Peripherals | Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT |
| Connectivity | CANbus, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG |
| Number of i (O) | 52 |
| Core processor | ARM® Cortex®-M3 |
| Case | 80-LQFP |
| Data converters | A/D 6x12b SAR; D/A 1x10b |
| Program memory size | 512KB (512K x 8) |
Frequently asked questions
Does the LPC1759FBD80K's 52 I/O fit a board designed for a 51-pin MCU in the same family?
The part provides 52 GPIO — one more than a typical 51-I/O design. Whether it drops in without a layout respin depends entirely on whether your board has one shared peripheral pin assigned as a spare. The 80-LQFP (12x12mm) package is the standard footprint for this series; check the lead pitch and thermal pad layout against your existing padstack.
What supply voltage does the LPC1759FBD80K require?
2.4V to 3.6V — designed for a 3.3V industrial rail without an intermediate LDO. The part does not tolerate 5V on its I/O; confirm your peripheral logic levels match before integration.
Can the LPC1759FBD80K run the same firmware as the LPC1756 without changes?
Both are Cortex-M3 parts in the LPC17xx family, but firmware compatibility depends on peripheral pin-mapping, memory map, and peripheral availability — not just the core architecture. The 512KB Flash vs typical LPC1756 configuration may require a re-flash and peripheral re-initialisation at minimum. Verify the datasheet pinout and memory map before assuming drop-in firmware compatibility.