
NXP LPC1751FBD80K — ARM Cortex-M3 MCU, 100MHz, 32KB Flash, 80-LQFP
NXP LPC1751FBD80K, LPC17xx series, ARM Cortex-M3 32-bit MCU, 100MHz, 32KB Flash / 8KB RAM, 52 I/O, CAN, USB OT+, Motor Control PWM, 2.4–3.6V supply, -40°C to 85°C, 80-LQFP (12x12mm) tray.
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Specifications
| Parameter | Value |
|---|---|
| Series | LPC17xx |
| Mounting type | Surface Mount |
| Oscillator type | Internal |
| Program memory type | FLASH |
| Voltage - supply (Vcc (Vdd)) | 2.4V ~ 3.6V |
| Operating temperature | -40°C~85°C(TA) |
| Speed | 100MHz |
| Package | Tray |
| RAM size | 8K x 8 |
| Core size | 32-Bit Single-Core |
| Peripherals | Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT |
| Connectivity | CANbus, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB |
| Number of i (O) | 52 |
| Core processor | ARM® Cortex®-M3 |
| Case | 80-LQFP |
| Data converters | A/D 6x12b SAR |
| Program memory size | 32KB (32K x 8) |
Frequently asked questions
Is the LPC1751FBD80K footprint-compatible with the LPC1768 for a board-swap upgrade?
The LPC1751FBD80K (80-LQFP 12x12mm) and the LPC1768 share the same 80-pin package footprint and are pin-compatible on core power and ground signals, but the 32KB Flash / 8KB RAM versus 512KB Flash / 64KB RAM difference is a firmware, not a hardware, blocker. A direct drop-in without a firmware rebuild and linker-script update will not run correctly. Confirm the board layoutFab matches the 80-pin pattern — not the 64-pin variant found in lower-density LPC17xx SKUs.
Does the LPC1751FBD80K require an external supervisor for motor-control power-stage compliance, or does the internal brown-out detect cover it?
The LPC1751 has an integrated brown-out detect and POR. For general undervoltage lockout this covers the basic reset case. For motor-control designs where the power stage can produce 300ms+ supply dips, verify the BOD threshold and response time against the SAR ADC's valid-conversion window — a tight safety margin may call for an external voltage supervisor. The 2.4V minimum supply and the brown-out threshold are in the NXP LPC1751 datasheet.
What package does the LPC1751FBD80K actually use — 64-pin or 80-pin?
The LPC1751FBD80K is the 80-pin variant in a 12x12mm LQFP body (80-LQFP) with 52 GPIOs. A common sourcing error on this series is confusing it with the 64-pin LPC175x variants, which have a different footprint and different GPIO count. Verify the board's Fab drawing before ordering — a 64-pin part will not drop into an 80-pin footprint.
Does the internal oscillator support USB full-speed timing on the LPC1751FBD80K?
The LPC1751 uses an internal RC oscillator for core timing. USB full-speed requires ±0.25% bit timing accuracy, which the internal oscillator alone does not guarantee. Most designs using the USB OT+ peripheral add an external crystal or dedicated clock reference. The CAN, UART/USART, and Motor Control PWM peripherals are clocked from the core clock tree and are usable with the internal oscillator for non-USB timing-critical loops.