Dual-channel signal-threshold detection
The MAX989ESA+: The output stage supports CMOS, push-pull, rail-to-rail, and TTL logic levels, eliminating the need for external pull-up resistors when interfacing to digital logic inputs.
Parametric highlights for BOM fit
Propagation delay is 450 ns maximum, setting the upper bound on the comparator's toggle rate in a closed-loop or zero-crossing detection path. For a 100 kHz input, the delay represents under 5% of the period, so the output tracks the input within one clock cycle. Quiescent current is 24 µA maximum per device, keeping the comparator's own draw negligible in a battery-powered sensor node that spends most of its time in a low-power monitoring state. Built-in hysteresis of ±3 mV prevents output chatter when the input signal crosses the threshold slowly or carries noise, without requiring external positive feedback resistors.
Common-mode rejection ratio (CMRR) and power-supply rejection ratio (PSRR) are both 80 dB typical, so the threshold accuracy is maintained when the supply rail drifts or common-mode voltage shifts.