Quad comparator with 0.5 ns propagation delay
The MAX9602EUG+ is a quad general-purpose comparator from Analog Devices, packing four independent comparator channels in a single 24-TSSOP package. The headline spec is the 0.5 ns maximum propagation delay — this puts it in the ultra-fast comparator class, suitable for high-speed signal chains where the comparator's decision time must not become the timing bottleneck. Each channel delivers complementary differential PECL outputs, meaning the part interfaces directly with PECL-logic inputs on FPGAs, ASICs, or high-speed ADCs without an external level translator. The 30 mV internal hysteresis eliminates output chatter when the input signal crosses the threshold slowly or carries noise.
Signal-chain fit and noise rejection
With 70 dB CMRR and 65 dB PSRR typical, the MAX9602EUG+ rejects common-mode noise on the input lines and supply-rail ripple that would otherwise cause false triggering. In a noisy industrial backplane or a mixed-signal board with switching regulators nearby, these rejection figures keep the comparator's decision grounded in the signal, not the environment. The 6 µA maximum input bias current at ±5.2 V / 5 V supplies means the comparator presents a light load to the source — useful when the input comes from a high-impedance sensor or a previous stage that cannot drive significant current. Maximum input offset is 5 mV, which combined with the 30 mV hysteresis gives a predictable switching window. Quiescent current draws up to 39 mA across all four channels — budget this into the supply rail sizing. The 50 mA typical output drive per channel can sink or source enough current to drive a 50-ohm terminated PECL line or a short trace to a downstream receiver.
Industrial temperature and active lifecycle
The 24-TSSOP package with 0.173-inch body width and 4.40 mm height sits on a standard surface-mount footprint — no fine-pitch challenges at 0.65 mm typical lead pitch.