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Analog Devices MAX9275GTN/V+T — Microcontrollers & Processors (MCU / MPU / DSP)

MAX9275GTN/V+T Serializer, 3.12 Gbps, 28:1, 56-TQFN

MPNMAX9275GTN/V+T
End of Life

Analog Devices MAX9275GTN/V+T serializer, 3.12 Gbps, 28 LVCMOS inputs, 1 CML output, 56-TQFN (8x8), -40 to +105°C, Tape & Reel.

$17.20555Ref. price · indicative, final on quote
Packaging56-WFQFN Exposed Pad
StockContact for availability
Lead timeIn Stock wk
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

MAX9275GTN/V+T Technical Specifications
ParameterValue
Input typeLVCMOS
Output typeCML
Mounting typeSurface Mount
Voltage1.7V ~ 1.9V
Number of inputs28
Number of outputs1
Operating temperature-40°C ~ 105°C (TA)
PackageTape & Reel (TR)
FunctionSerializer
Data rate3.12Gbps
Case56-WFQFN Exposed Pad

Product details

28:1 serializer at 3.12 Gbps — what the data rate means for the link

The MAX9275GTN/V+T is a 28-input, 1-output serializer from Analog Devices, part of their GMSL (Gigabit Multimedia Serial Link) family. It takes 28 parallel LVCMOS inputs and serializes them onto a single CML output at up to 3.12 Gbps — that is the raw bit rate on the serial line, not the payload throughput. At 3.12 Gbps, the serial stream carries 28 bits per pixel clock cycle, so the effective parallel-side pixel clock is 3.12 Gbps ÷ 28 = ~111 MHz. If your camera or display interface runs a pixel clock above that, the serializer cannot keep up — the 3.12 Gbps figure sets the ceiling on the parallel input rate, not just the cable speed.

Supply rails and temperature — industrial-automotive crossover

This is not the full under-hood 125°C grade, but it suits camera modules behind the windshield or inside an IP65-rated housing on a factory floor.

56-TQFN package — thermal and layout notes

The 56-WFQFN exposed-pad package (8x8 mm, 0.5 mm pitch) has a large thermal pad on the bottom. For a 3.12 Gbps CML output, the differential trace pair should be 100 Ω controlled impedance, with the ground plane directly under the package pad to minimise the loop area. The 0.5 mm pitch means a 4-layer board is practical for fan-out; a 2-layer board will struggle to route all 28 LVCMOS inputs without vias.