Skip to main content
Analog Devices MAX9272AGTM/V+ — Microcontrollers & Processors (MCU / MPU / DSP)

MAX9272AGTM/V+ 1.5Gbps GMSL Deserializer, AEC-Q100, 48-TQFN

MPNMAX9272AGTM/V+
End of Life

Analog Devices MAX9272AGTM/V+ GMSL deserializer, 1.5Gbps data rate, 1-channel CML input, 28-bit CMOS/LVCMOS output, 48-TQFN exposed pad, -40°C to +105°C, AEC-Q100, ROHS3.

$10.96Ref. price · indicative, final on quote
Packaging48-WFQFN Exposed Pad
StockContact for availability
Lead timeIn Stock wk
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

MAX9272AGTM/V+ Technical Specifications
ParameterValue
SeriesAutomotive, AEC-Q100
Input typeCML
Output typeCMOS, LVCMOS
Mounting typeSurface Mount
Voltage1.7V ~ 3.6V
Number of inputs1
Number of outputs28
Operating temperature-40°C ~ 105°C (TA)
PackageTube
FunctionDeserializer
Data rate1.5Gbps
Case48-WFQFN Exposed Pad

Product details

GMSL deserializer for automotive camera and display links

The MAX9272AGTM/V+ is a 1.5 Gbps GMSL deserializer that takes a single CML serial input from a coax or STP cable and fans it out to a 28-bit wide CMOS or LVCMOS parallel bus. This is the receive side of a GMSL link — it mates with the MAX9271 or similar serializer to carry uncompressed video or bidirectional control data over a single coaxial cable up to 15 meters.

1.5 Gbps serial link and 1:28 deserialization

The single CML input accepts a differential or single-ended serial stream at up to 1.5 Gbps — enough for a 720p60 or 1080p30 video stream plus embedded audio and UART control data on the same coax. The deserializer recovers the clock from the data stream, so no separate reference clock is needed at the receive end. On the output side, 28 parallel CMOS/LVCMOS lines present the deserialized data to the host SoC or FPGA. The wide bus width means a single deserializer can carry 24-bit video plus 4 bits of control or status without needing a second link.

Active production and AEC-Q100 compliance

RoHS3 compliant (2011/65/EU + 2015/863) with no exemption-based restrictions — the part is fully lead-free and compatible with standard reflow profiles.

Frequently asked questions

What is the data rate and output width of this deserializer?

The MAX9272AGTM/V+ supports a 1.5 Gbps CML serial input and deserializes to 28 parallel CMOS/LVCMOS outputs. This 1:28 fan-out is typical for GMSL camera links carrying 24-bit video plus 4 auxiliary bits.