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Analog Devices MAX5231BEEE+ — Discrete Semiconductors

MAX5231BEEE+ Dual 12-Bit DAC, Voltage Out, SPI, 16-QSOP

MPNMAX5231BEEE+
End of Life

Analog Devices MAX5231BEEE+ dual 12-bit voltage-output DAC, SPI interface, internal reference, 10 µs settling, ±1 LSB INL/DNL, 16-QSOP package, tube.

$13.77Ref. price · indicative, final on quote
Packaging16-SSOP (0.154", 3.90mm Width)
StockContact for availability
Lead timeIn Stock wk
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

MAX5231BEEE+ Technical Specifications
ParameterValue
Output typeVoltage - Buffered
Mounting typeSurface Mount
Reference typeInternal
Voltage - supply, analog5V
Voltage - supply, digital5V
InterfaceSPI
Operating temperature-40°C ~ 85°C
PackageTube
ArchitectureR-2R
INL (DNL)±1 (Max), ±1 (Max)
Settling time10µs (Typ)
Number of bits12
Case16-SSOP (0.154\", 3.90mm Width)
Differential outputNo
Number of d (A converters)2

Product details

Dual 12-bit DAC for precision analog output

The MAX5231BEEE+ integrates two 12-bit digital-to-analog converters with buffered voltage outputs on a single die, communicating over an SPI bus. The two converters share an internal reference and a common 5 V supply rail, so the BOM fit question is whether the system needs two independent analog outputs on one IC — this part delivers that without an external reference IC.

Linearity and settling — the accuracy budget

±1 LSB max INL and DNL across the 12-bit range sets the linearity floor — the DAC's output code will not deviate from the ideal transfer function by more than one LSB at any code, and no missing codes are guaranteed. For a 0-to-5 V output span, one LSB is 1.22 mV, so the system sees a maximum absolute error of about 1.22 mV from linearity alone. The 10 µs typical settling time to ±0.5 LSB defines the update rate ceiling. Driving a 100 kHz update at 10 µs per conversion leaves no margin for the SPI command overhead — practical throughput lands closer to 50 kHz to 80 kHz depending on the microcontroller's SPI clock speed and the number of command bytes per update. R-2R architecture delivers the 12-bit resolution without the glitch energy of a string-DAC topology. The internal reference eliminates the need for an external voltage reference IC, saving board area and one BOM line, but the reference accuracy is set by the on-chip bandgap — if the system requires a tighter absolute voltage tolerance than the internal reference provides, an external reference can override it via the REF input pin.

Package and board integration

The 16-SSOP (0.154-inch, 3.90 mm width) and the supplier package 16-QSOP are near-identical footprints — the QSOP has a narrower body (3.90 mm vs the typical 5.30 mm of a standard SSOP), so the PCB land pattern must match the exact supplier package variant listed on the BOM. Surface-mount assembly with a 0.025-inch (0.635 mm) lead pitch; the tube packaging means the pick-and-place feeder setup uses a tube feeder rather than a tape reel. ROHS3 compliant — no exemptions that complicate EU or California market entry.

Frequently asked questions

How can I order the MAX5231BEEE+ or check its availability?

Submit an RFQ with your target quantity and delivery timeline for a firm quote.