12-bit SAR ADC in a through-hole DIP
The MAX187BEPA+ is a 12-bit successive-approximation register (SAR) analog-to-digital converter from Analog Devices, sampling at 75k samples per second over an SPI serial interface. It integrates the track/hold, reference, and conversion clock on-chip, so the external BOM stays lean — just the input signal conditioning and a 5V supply rail.
Supply rails and signal chain fit
Both the analog and digital supplies are pinned to a single 5V rail — no split-plane regulation needed. The single-ended input architecture with an internal reference simplifies the front-end: a buffer or anti-aliasing filter drives the input directly, and the SAR core handles the conversion without an external reference IC. The SPI data interface keeps the digital side to four wires (SCLK, CS, DOUT, DIN), which routes cleanly to any MCU or DSP with a dedicated SPI peripheral. The 1:1 S/H-to-ADC ratio means the track/hold acquires the sample in one clock phase and the SAR converts in the next — no pipeline latency to budget.
The 8-PDIP footprint is a standard 0.100-inch pitch layout — no fine-pitch soldering, no BGA reflow profile, and the part is hand-solderable for prototype or low-volume builds. Supplied in tubes, the parts are oriented for automatic insertion equipment or manual assembly. The package itself is the limiting factor for board density, but for a retrofit or a legacy bus where 12-bit resolution at 75 kHz is sufficient, the DIP form factor is a direct drop-in.