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Analog Devices MAX1081AEUP+ — Microcontrollers & Processors (MCU / MPU / DSP)

MAX1081AEUP+ ADC, 10-bit SAR, 300k SPS, 20-TSSOP

MPNMAX1081AEUP+
End of Life

Analog Devices MAX1081AEUP+ SAR ADC, 10-bit, 300k SPS, 4/8-channel MUX, pseudo-differential/single-ended inputs, SPI, 2.7-3.6V, 20-TSSOP, tube.

$20.68Ref. price · indicative, final on quote
Packaging20-TSSOP (0.173", 4.40mm Width)
StockContact for availability
Lead timeIn Stock wk
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

MAX1081AEUP+ Technical Specifications
ParameterValue
Input typePseudo-Differential, Single Ended
Mounting typeSurface Mount
Reference typeExternal, Internal
Voltage - supply, analog2.7V ~ 3.6V
Voltage - supply, digital2.7V ~ 3.6V
Number of inputs4, 8
InterfaceSPI
Operating temperature-40°C ~ 85°C
PackageTube
ArchitectureSAR
ConfigurationMUX-S/H-ADC
Number of bits10
Case20-TSSOP (0.173\", 4.40mm Width)
Ratio - s (H:ADC)1:1
Number of a (D converters)1
Sampling rate (Per second)300k

Product details

300k SPS throughput for multiplexed acquisition

The MAX1081AEUP+ is a 10-bit successive-approximation (SAR) ADC from Analog Devices that samples at 300k samples per second. That throughput matters when you're cycling through multiple channels — with the internal 4- or 8-input mux, each channel gets a fresh conversion in under 3.3 µs. The SAR architecture means no pipeline delay: the output corresponds to the sample taken at the start of the conversion window, not two cycles back. The input stage accepts either pseudo-differential or single-ended signals. In pseudo-differential mode, the common-mode rejection helps on noisy factory-floor grounds; single-ended doubles the channel count to 8 when signal return paths are clean. The 1:1 S/H-to-ADC ratio means the sample-and-hold capacitor acquires the mux output before each conversion — the mux settling time, not the ADC, often sets the system scan rate.

Single supply rail and industrial temperature range

No separate AVDD/DVDD sequencing needed. The reference can be driven externally or sourced from the internal bandgap — the external reference path improves gain accuracy when the system has a stable 2.5 V or 3.0 V reference already on the board.

20-TSSOP package and reflow considerations

The 0.65 mm pitch is pick-and-place friendly — no via-in-pad required for fan-out. Check the moisture sensitivity level before reflow; the tube packaging doesn't include a moisture barrier bag, so if the MSL is 3 or higher and the part has been exposed to ambient humidity, a bake cycle is needed before the oven to prevent popcorning. The supplier device package is 20-TSSOP, which matches the package/case entry. No exposed pad — all 20 leads are on the perimeter, so solder-joint inspection is straightforward with an AOI system.

Active lifecycle and compliance status

Sourced through independent distribution channels.

Frequently asked questions

How can I order the MAX1081AEUP+ or check its availability?

The MAX1081AEUP+ is an active Analog Devices part, sourced to order against your BOM quantity. No stock-holding claim is made on this page.

What is the MAX1081AEUP+'s sampling rate and resolution?

It is a 10-bit SAR ADC sampling at 300k samples per second. The 10-bit output gives 1024 codes across the input range, and the 300k SPS rate allows scanning 8 single-ended channels at 37.5k samples per channel per second.

Does the MAX1081AEUP+ support differential inputs?

It supports pseudo-differential inputs, not fully differential. In pseudo-differential mode, the signal is measured against a common reference (COM pin), which rejects common-mode noise on the signal return path. For true differential pairs, you would need a different ADC architecture.