Device identity and signal interface
The LTC6957IDD-3#PBF is a 1:2 fanout buffer from Analog Devices, part of the LTC6957 family. It accepts differential or single-ended clock inputs across CML, CMOS, LVDS, and LVPECL standards and delivers a single-ended CMOS output at up to 300 MHz. The supply rail is tight at 3.15V to 3.45V — a 3.3V rail with ±5% regulation stays inside the envelope; a 2.5V or 5V rail requires an intermediate regulator. Not rated for under-hood or avionics environments.
Package and footprint considerations
Housed in a 12-lead WFDFN with an exposed pad (3x3 mm body, supplier package 12-DFN). The exposed paddle must be soldered to a ground plane for thermal and electrical performance — a via array under the pad is recommended. Surface-mount only; no through-hole variant. The 0.50 mm pitch demands careful PCB layout — a 2-layer board can work with proper fan-out, but 4-layer simplifies signal integrity for the 300 MHz clock path.
Lifecycle and compliance
ROHS3 compliant (lead-free).
Sourcing and availability
Active and available through our distribution network. Quoted to order against your BOM quantity — no stock-holding claim, sourced per RFQ. Small quantities (tube quantities) are typically feasible.