Analog Devices LTC6957IDD-2#PBF, Fanout Buffer (Distribution), 1:2 ratio, LVDS output, 300 MHz max frequency, 3.15V to 3.45V supply, -40°C to 85°C, 12-DFN (3x3) package.
| Parameter | Value |
|---|---|
| Type | Fanout Buffer (Distribution) |
| Mounting type | Surface Mount |
| Voltage | 3.15V ~ 3.45V |
| Frequency | 300 MHz |
| Operating temperature | -40°C ~ 85°C |
| Input | CML, CMOS, LVDS, LVPECL |
| Output | LVDS |
| Package | Tube |
| Case | 12-WFDFN Exposed Pad |
| Number of circuits | 1 |
| Ratio - Input:Output | 1:2 |
| Differential - Input:Output | Yes/Yes |
The LTC6957IDD-2#PBF is a 1:2 fanout buffer that accepts a single differential or single-ended input — CML, CMOS, LVDS, or LVPECL — and delivers two LVDS outputs. It runs up to 300 MHz, which covers most ADC/DAC sampling clocks and FPGA reference distribution in the 100–300 MHz band. The supply rail is tight at 3.15V to 3.45V, so the board's 3.3V regulator needs ±4.5% accuracy or better — a standard LDO with 1% tolerance fits.
Both are 1:2 fanout buffers with the same 300 MHz max frequency, supply range, and package. The -2 version outputs LVDS; the -1 version outputs LVPECL. Choose the output logic family that matches your downstream receiver — LVDS for lower swing and lower power, LVPECL for higher noise margin on long traces.
Yes, the -2 suffix indicates LVDS outputs. The input can be CML, CMOS, LVDS, or LVPECL — the buffer translates any of those to LVDS levels.
Yes, it is ROHS3 Compliant. The #PBF suffix explicitly indicates lead-free (Pb-free) finish.