14-bit R-2R DAC with 1 µs settling
The LTC2641CDD-14#PBF is a single-channel, 14-bit voltage-output DAC built on an R-2R ladder architecture. The R-2R topology is inherently monotonic and produces low glitch energy, so no external deglitching filter is needed in most signal-chain designs. Settling time is 1 µs typical to ±0.5 LSB — fast enough for closed-loop control loops updating at hundreds of kilohertz. The SPI data interface accepts clock rates up to 50 MHz, keeping the serial transaction time well under the settling window. INL and DNL are both ±0.5 LSB maximum, guaranteeing monotonicity and no missing codes across the full 14-bit transfer curve.
Single-supply rail and board fit
The output is voltage-unbuffered, meaning the DAC output impedance is the R-2R ladder's own (typically 5 kΩ to 10 kΩ). A downstream op-amp buffer is expected when driving loads below 10 kΩ or when the output must drive a long trace. The reference input is external — the full-scale output equals the reference voltage times the DAC gain (1× for this part). Packaged in an 8-lead WFDFN with exposed pad (3×3 mm body — supplier device package 8-DFN). Tube shipment — 100 pieces per tube.
Active lifecycle and compliance
RoHS3 compliant (2015/863/EU) with no exemptions. The lead finish on the DFN package is matte tin over nickel barrier — no SnPb or other restricted substances.