20-bit SAR at 250 kS/s — precision without the speed penalty
The LTC2376IMS-20#PBF is a 20-bit successive-approximation-register (SAR) ADC that samples at 250 kS/s — a combination that puts it in the sweet spot for precision data acquisition where you need both resolution and throughput. The 20-bit output means each sample resolves to one part in 1,048,576, while the 250 kS/s rate keeps up with multi-channel multiplexed systems or moderate-bandwidth signals without dropping into the slower delta-sigma regime. The differential input architecture rejects common-mode noise from the signal source and ground loops, which is the deciding factor for bridge sensors, thermocouple front-ends, or any application where the signal rides on a DC offset. The single-ended equivalent would lose half the dynamic range to the common-mode voltage — here the full 20-bit code range is available for the signal of interest.
Single supply rail, compact footprint
The trade-off is headroom — the reference input must be external and the input signal must swing within the supply rails. For a 2.5 V reference, the full-scale differential input is ±Vref, so the signal chain needs to be gain-matched to that span. The 16-MSOP package measures 3 mm × 3 mm, which fits into tight channel spacing on a multi-channel card. The SPI data interface keeps the digital pin count low — four wires (SCK, SDI, SDO, CS) — and isolates easily with a standard digital isolator if the ADC sits on a different ground plane from the controller.