Active production — current-silicon availability
The LTC2366CS6#TRMPBF: ROHS3 compliance is confirmed, removing exemption-based restrictions for EU and similar regulated-market BOMs.
3 Msps SAR — what the speed rating means for the signal chain
12-bit successive-approximation-register (SAR) architecture sampling at 3 Msps — the conversion completes in roughly 333 ns, after which the result is shifted out over the SPI bus at the master clock rate. The single-ended input (1:1 S/H-to-ADC ratio) means the converter samples the voltage on the single analog input pin relative to the common ground — no differential drive required, but the input must settle to 12-bit accuracy within the acquisition window. External reference input gives the designer control over the full-scale range — the LSB step size is Vref / 4096, so choosing a lower reference voltage reduces the step size at the cost of a tighter noise budget.
TSOT-23-6 footprint and supply rails
The TSOT-23-6 package (0.65 mm lead pitch) fits a compact PCB layout — the analog and digital supply rails share the same 2.35 V to 3.6 V range, so a single LDO or buck output can power both AVDD and DVDD without a split-rail regulator. Surface-mount assembly with standard lead-free reflow profile; the thin SOT-23 body requires careful stencil design to avoid solder bridging on the 0.65 mm pitch leads.