Two-channel SAR with simultaneous capture
The LTC2321IUFD-14#PBF is a 14-bit successive-approximation-register (SAR) ADC from Analog Devices that samples two channels simultaneously at 2 MSPS per channel — the 1:1 S/H-to-ADC ratio means each input has its own track-and-hold, so there is no skew between the two conversions. Each input accepts either differential or pseudo-differential signals, giving the designer flexibility to handle a true differential sensor pair or a single-ended signal referenced to a common return without an external op-amp stage.
Supply rails and interface
The analog and digital supply ranges overlap at 3.13 V to 3.47 V, and the part also accepts a separate 5 V analog rail — this lets the ADC run from a common 3.3 V bus while keeping the analog front-end on a cleaner 5 V supply for better SNR on the input signal. Data is read out via either an LVDS serial interface (for high-speed, low-noise transfer over longer traces) or a standard CMOS serial interface — the dual-mode output lets the same part serve a backplane with LVDS receivers or a local SPI port.