The DS1818-10+T&R: The output is Open Drain or Open Collector, so the reset line requires an external pull-up resistor to the logic supply rail. This is the standard interface for wired-OR reset buses where multiple supervisors share a common line. Voltage threshold is 2.88 V, suitable for monitoring a 3.3 V or 3.0 V rail. The reset timeout is 100 ms minimum, which gives the downstream MCU or logic time to stabilize after the supply returns within tolerance. The single-channel design monitors one voltage rail.
Housed in a TO-226-3 / TO-92-3 package with formed leads, through-hole mounting. The supplier device package is TO-92-3 — a three-lead, single-in-line footprint that mates with standard 0.100-inch pitch through-hole layouts. ROHS3 compliant.