130ms timeout — sizing the hold-off
The 130ms minimum reset timeout gives the power supply and oscillator time to stabilise before the processor starts executing code. Most MCUs need between 1ms and 100ms for their internal PLL and regulator to settle, so 130ms provides margin across a range of devices. If your processor has a fast-starting internal oscillator and a small bypass cap, the 130ms hold-off is generous — it will not cause a boot delay issue. If you are chaining multiple supervisors or using a watchdog that expects a shorter reset pulse, verify the timing budget against the processor's minimum reset pulse width requirement.
Lifecycle and sourcing
The DS1705ESA+ is listed as Active with ROHS3 compliance. For a BOM line that needs a simple 5V supervisor, this part carries no near-term obsolescence risk.
