Low-noise LDO for sensitive analog and RF rails
The Analog Devices ADM7155ARDZ-02-R7 is a 600 mA adjustable positive LDO regulator designed for applications where power-supply rejection matters across a wide frequency band. Its PSRR holds 94 dB at 1 kHz and still delivers 61 dB at 1 MHz, which makes it a natural fit for cleaning up the supply to a VCO, PLL, or high-speed ADC where switching-regulator ripple at MHz frequencies would otherwise couple into the signal path. The output adjusts from 1.2 V to 2.4 V via external resistors, covering the core and I/O voltages of many FPGAs, SoCs, and data converters.
Dropout and headroom planning
Maximum dropout is 210 mV at the full 600 mA load. That means a 3.3 V input rail needs only 3.51 V to hold regulation, so this part tolerates a 5% sag on a 3.6 V bus without dropping out. For a 2.5 V output fed from a 3.3 V rail, the headroom is generous — the 800 mV delta leaves margin for the regulator's own overhead and the 10 mA maximum supply current.
Package and thermal considerations
Housed in an 8-SOIC with exposed pad (8-SOIC-EP, 0.154" body width), the thermal pad must be soldered to a PCB copper plane to dissipate heat from the 600 mA output.
Protection and control features
Built-in over-current and over-temperature protection cover the common fault cases: a shorted output or an ambient spike past 125°C. The enable pin allows the regulator to be sequenced or shut down by a system supervisor or GPIO. Quiescent current runs 7 mA typical, which is higher than a micropower LDO but expected for a part optimized for noise and PSRR rather than standby efficiency.