4.8 GHz fanout buffer with 2:10 mux
The ADCLK950BCPZ is a SiGe fanout buffer and 2:1 multiplexer that distributes one of two selectable clock or data inputs to ten LVPECL outputs at frequencies up to 4.8 GHz. The 2:10 ratio lets you feed a single reference to multiple high-speed converters, FPGAs, or SerDes lanes without adding a separate mux stage. Inputs accept CML, CMOS, LVDS, and LVPECL levels, so the same part can buffer a crystal oscillator, a PLL output, or a differential data stream without external level shifters. All signal paths are fully differential, preserving signal integrity at multi-GHz edge rates.
Supply, package, and temperature grade
Runs from a single 2.97 V to 3.63 V supply — compatible with common 3.3 V clock-tree rails. The 40-LFCSP-VQ (6x6 mm) exposed-pad package requires a thermal via array under the paddle to keep the junction below the 85°C ceiling at the full output load. The ROHS3 compliance is current — no exemption-based restrictions on the BOM.
Active production — sourcing posture
The 40-LFCSP is a common footprint — no special MSL concerns beyond the standard Level 3 moisture sensitivity typical for exposed-pad QFN packages.