7.5 GHz SiGe clock fanout buffer — 1:2 split, differential ECL outputs
The ADCLK925BCPZ-R7 is a 1:2 clock buffer from Analog Devices' SiGe series, designed to distribute a single differential clock input to two identical ECL/NECL/PECL outputs at frequencies up to 7.5 GHz. That 7.5 GHz ceiling places it squarely in the RF/data-converter clock-tree space — think 10+ Gbps SERDES reference clocks, high-speed ADC/DAC sampling clocks, or instrumentation backplanes where edge jitter and skew directly limit system SNR.
The part operates from 2.375V to 3.63V, covering 2.5V and 3.3V rails without a separate regulator.
It is ROHS3 compliant and supplied in Tape & Reel (also available as Cut Tape).
16-LFCSP 3x3 mm — thermal pad and layout notes
The 16-lead LFCSP-VQ package measures 3x3 mm with an exposed pad (16-LFCSP-VQ). The 0.50 mm pitch demands a controlled-impedance PCB stack-up; a 4-layer board with a solid ground plane under the part is typical for 7.5 GHz operation.