7.5 GHz dual buffer for high-speed clock trees
The ADCLK907BCPZ-R2 is a two-channel clock buffer from Analog Devices' SiGe series, rated for a maximum frequency of 7.5 GHz. Each channel accepts a differential clock input and delivers a differential ECL, NECL, or PECL output — the output standard is set by the supply voltage and termination, not a pin strap. With two independent 1:1 buffers in a single 16-LFCSP-VQ (3x3 mm) package, this part can replace two single-channel buffers on a dense board, freeing layout space for the high-speed signal traces that need it most.
The supply voltage spans 2.375 V to 3.63 V, covering 2.5 V and 3.3 V rails common in high-speed ADC and FPGA clock distribution. The 1:1 input-to-output ratio means each channel fans out one clock without division or multiplication — this is a pure buffer, not a clock generator or divider. The differential input and output architecture rejects common-mode noise on long PCB traces or cable runs.