{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"XC9572XL-10TQG100I","brand":"AMD (Xilinx)","brandSlug":"amd-xilinx","productSlug":"XC9572XL-10TQG100I","canonicalUrl":"https://icboms.com/amd-xilinx/XC9572XL-10TQG100I","factsUrl":"https://icboms.com/api/mcp/products/XC9572XL-10TQG100I","rawCanonicalId":null},"summary":{"shortDescription":"Xilinx XC9500XL series CPLD, XC9572XL-10TQG100I, 72 macrocells, 72 I/O, 10 ns pin-to-pin delay, 100-TQFP, 3.3 V, -40°C to 85°C.","salesMarkdown":"## 72-macrocell CPLD in 100-TQFP — timing and I/O budget The XC9572XL-10TQG100I is a 72-macrocell CPLD from the XC9500XL series, packaged in a 100-TQFP (14x14 mm) with 72 user I/O pins. The 10 ns pin-to-pin propagation delay (tpd) sets the timing floor for registered and combinatorial paths — a 100 MHz-equivalent state machine is feasible if the critical path stays under 10 ns, but the actual toggle rate depends on the load capacitance and output slew. The 72 macrocells and 1600 usable gates cover glue logic, address decoding, or state-machine control for a mid-density board. ## In-system programmability and endurance for field updates The device is In System Programmable with a minimum of 10,000 program/erase cycles — sufficient for production programming and several field firmware revisions over the product lifetime. The JTAG interface reuses four I/O pins and does not require a dedicated programmer voltage; the core 3.3 V rail powers the programming operation. Each of the four logic blocks (Function Blocks) contains 18 macrocells, giving the architecture a predictable fan-in and routing delay per block. ## Package and board-fit for the 100-TQFP The 100-TQFP (14x14 mm body, 0.5 mm pitch) is a standard quad flat pack that routes on a 4-layer board without blind vias. The exposed paddle on the bottom is not present — this is a non-thermally-enhanced TQFP, so the thermal dissipation relies on the copper pad under the package and airflow. The supplier device package is listed as 100-TQFP (14x14). The tray packaging (: Tray) is the standard shipping medium for this QFP body size — suitable for pick-and-place with a JEDEC tray feeder. ## Active lifecycle and compliance status It is ROHS3 compliant (: ROHS3 Compliant), meaning no restricted substances above the threshold limits, including the four phthalates added in the 2015 EU RoHS recast. The base product number XC9572 covers the whole 72-macrocell density in the XC9500XL family; the suffix -10TQG100I encodes the speed grade (10 ns), package (TQFP-100), and temperature range (industrial). For a BOM hedge, the same base number in a different speed or package grade is a parametric variant, not a pin-compatible alternative — confirm the footprint and timing requirements before substituting.","metaTitle":"XC9572XL-10TQG100I CPLD, 72 macrocells, 10 ns, 100-TQFP","metaDescription":"XC9572XL-10TQG100I CPLD from XC9500XL series: 72 macrocells, 72 I/O, 10 ns tpd, 3.3 V, -40 to 85°C. Active production, ROHS3 compliant. Quoted to order.","metaKeywords":null},"attributes":{"series":"XC9500XL","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["FPGA / CPLD & Programmable Logic"],"specifications":{"Mfr":"AMD Xilinx","Series":"XC9500XL","Package":"Tray","Mounting Type":"Surface Mount","Number of I/O":"72","Package / Case":"100-LQFP","Product Status":"Active","Number of Gates":"1600","lifecycle_stage":"unknown","Programmable Type":"In System Programmable (min 10K program/erase cycles)","Base Product Number":"XC9572","Number of Macrocells":"72","Delay Time tpd(1) Max":"10 ns","Operating Temperature":"-40°C~85°C(TA)","Supplier Device Package":"100-TQFP (14x14)","Voltage Supply - Internal":"3V ~ 3.6V","Number of Logic Elements/Blocks":"4"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$23.83020","priceTiers":[{"qty":1,"price":"$23.83020","currency":"USD"},{"qty":10,"price":"$22.62996","currency":"USD"},{"qty":30,"price":"$20.54844","currency":"USD"},{"qty":100,"price":"$18.73236","currency":"USD"}]},"links":{"datasheetUrl":null,"sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/XC9572XL-10TQG100I/alternatives.json"},"ai":{"faq":[{"question":"What is the closest pin-compatible alternative to the XC9572XL-10TQG100I in the XC9500XL family?","answer":"The XC9572XL-10TQG100I is the 72-macrocell, 10 ns speed, industrial-temperature variant in the 100-TQFP package. The same base number (XC9572) in a different speed grade (e.g., -7TQG100I for 7.5 ns) or temperature range (C for commercial) shares the same pinout and footprint, but the timing and temperature specs differ."},{"question":"What compliance documentation is available for the XC9572XL-10TQG100I?","answer":"The part is ROHS3 Compliant. Standard Xilinx documentation includes the datasheet, application notes, and PCN notifications for the XC9500XL series."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/amd-xilinx/XC9572XL-10TQG100I","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/amd-xilinx/XC9572XL-10TQG100I when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-09-28T15:04:15.359Z","lastPublished":"2026-09-28T15:04:15.359Z","indexable":true}}