{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"XC9536XL-10VQG44C","brand":"AMD (Xilinx)","brandSlug":"amd-xilinx","productSlug":"XC9536XL-10VQG44C","canonicalUrl":"https://icboms.com/amd-xilinx/XC9536XL-10VQG44C","factsUrl":"https://icboms.com/api/mcp/products/XC9536XL-10VQG44C","rawCanonicalId":null},"summary":{"shortDescription":"Xilinx XC9500XL series CPLD, XC9536XL-10VQG44C, 36 macrocells, 800 gates, 34 I/O, 10 ns pin-to-pin delay, 44-VQFP, 3.3 V, 0-70 °C, Tray.","salesMarkdown":"## 36 macrocells, 10 ns pin-to-pin — the glue-logic fit The XC9536XL-10VQG44C is a 36-macrocell CPLD from the XC9500XL series, packing 800 gates in a 44-VQFP package with 34 user I/O. The 10 ns pin-to-pin propagation delay (tpd) sets the ceiling for combinatorial paths through the device — at 100 MHz system clock, a single LUT level plus routing fits within one cycle, but two-level logic cascaded across macrocells starts to eat into setup margin. For address decoding, bus bridging, or state-machine control in a 3.3 V system, this delay class keeps the timing closure straightforward without needing a faster speed grade. ## In-system programmable — 10K cycle floor The device is in-system programmable with a minimum endurance of 10,000 program/erase cycles. That endurance floor covers field-update scenarios — firmware rollouts over the product lifetime won't wear out the configuration cells. The IEEE 1532 JTAG interface handles the programming; no separate high-voltage rail is needed. ## 44-VQFP — board-fit checklist The 44-VQFP (10x10 mm body, 0.8 mm pitch) is a standard fine-pitch QFP. The exposed pad is not present — thermal dissipation goes through the leads and the package body. The 34 I/O plus dedicated JTAG pins (TDI, TDO, TMS, TCK) and power/ground fill the 44 positions. Decoupling: one 0.1 µF ceramic per VCC pin pair, placed within 5 mm of the pin, keeps the core switching noise below the 200 mV peak-to-peak guideline. The 0.8 mm pitch routes cleanly on a two-layer board with 6/6 mil trace/space rules. ## Active lifecycle, RoHS3 — sourcing posture For a 3.3 V glue-logic design with a 10 ns timing budget, this is a stable, in-production choice with no near-term obsolescence risk.","metaTitle":"XC9536XL-10VQG44C CPLD, XC9500XL, 36 macrocells, 10 ns","metaDescription":"XC9536XL-10VQG44C CPLD from XC9500XL series, 36 macrocells, 10 ns pin-to-pin delay, 34 I/O, 44-VQFP. Active, RoHS3 compliant. Sourced to order.","metaKeywords":null},"attributes":{"series":"XC9500XL","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["FPGA / CPLD & Programmable Logic"],"specifications":{"Mfr":"AMD Xilinx","Series":"XC9500XL","Package":"Tray","Mounting Type":"Surface Mount","Number of I/O":"34","Package / Case":"44-TQFP","Product Status":"Active","Number of Gates":"800","lifecycle_stage":"unknown","Programmable Type":"In System Programmable (min 10K program/erase cycles)","Base Product Number":"XC9536","Number of Macrocells":"36","Delay Time tpd(1) Max":"10 ns","Operating Temperature":"0°C~70°C(TA)","Supplier Device Package":"44-VQFP (10x10)","Voltage Supply - Internal":"3V ~ 3.6V","Number of Logic Elements/Blocks":"2"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$13.27488","priceTiers":[{"qty":1,"price":"$13.27488","currency":"USD"},{"qty":10,"price":"$11.45592","currency":"USD"},{"qty":30,"price":"$9.67644","currency":"USD"},{"qty":100,"price":"$8.74728","currency":"USD"}]},"links":{"datasheetUrl":null,"sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/XC9536XL-10VQG44C/alternatives.json"},"ai":{"faq":[{"question":"What is the pin-to-pin delay of XC9536XL-10VQG44C?","answer":"The maximum pin-to-pin propagation delay (tpd) is 10 ns. This is the combinatorial delay from any input through the interconnect matrix to any output — it sets the maximum clock frequency for registered paths and the timing margin for combinatorial decode logic."},{"question":"Is XC9536XL-10VQG44C RoHS compliant?","answer":"Yes, it is RoHS3 compliant."},{"question":"How many I/O pins does XC9536XL-10VQG44C have?","answer":"34 user I/O pins are available in the 44-VQFP package. The remaining pins are dedicated to JTAG (4 pins), power, and ground."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/amd-xilinx/XC9536XL-10VQG44C","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/amd-xilinx/XC9536XL-10VQG44C when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-09-28T15:04:15.359Z","lastPublished":"2026-09-28T15:04:15.359Z","indexable":true}}