{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"XC3S5000-4FGG1156C","brand":"AMD (Xilinx)","brandSlug":"amd-xilinx","productSlug":"XC3S5000-4FGG1156C","canonicalUrl":"https://icboms.com/amd-xilinx/XC3S5000-4FGG1156C","factsUrl":"https://icboms.com/api/mcp/products/XC3S5000-4FGG1156C","rawCanonicalId":null},"summary":{"shortDescription":"Xilinx Spartan®-3 series FPGA, XC3S5000-4FGG1156C, 5,000,000 gates, 74,880 logic cells, 633 user I/O, 1.14 V core, 1,916,928 bit block RAM, surface-mount Bulk package.","salesMarkdown":"## Spartan-3 FPGA — 5 million gates for medium-density logic The Xilinx XC3S5000-4FGG1156C is a Spartan®-3 series FPGA packing 5,000,000 gates and 74,880 logic cells in a surface-mount package. With 633 user I/O and 1,916,928 bits of block RAM, it handles moderate digital designs — think soft-core processor plus peripheral glue, video line buffers, or multi-channel data acquisition — without reaching for a larger die. Core supply runs at 1.14 V, which keeps dynamic power in check for the gate count. ## 633 I/O — what it means for the board layout 633 user I/O pins are available. Each I/O bank operates at its own Vccio, supporting multiple voltage domains. ## Active lifecycle — no LTB pressure The XC3S5000-4FGG1156C carries an Active product status. No official successor is listed.","metaTitle":"Xilinx XC3S5000-4FGG1156C Spartan-3 FPGA, 5M Gates, 633 I/O","metaDescription":"Xilinx Spartan-3 FPGA XC3S5000-4FGG1156C with 5 million gates, 74,880 logic cells, 633 I/O, 1.14 V core. Active lifecycle. Sourced to order against RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["FPGA / CPLD & Programmable Logic"],"specifications":{"series":"Spartan®-3","package_type":"Bulk","Number Of I/O":"633","mounting_type":"Surface Mount","Total Ram Bits":"1916928","product_status":"Active","Number Of Gates":"5000000","lifecycle_stage":"eol_hot","supply_voltage_v":"1.14","Number Of Labs/Clbs":"8320","Number Of Logic Elements/Cells":"74880"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$256.11","stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/36f52d1b880c383905bd0bfe1d6a4cd8.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the XC3S5000-4FGG1156C datasheet and pinout?","answer":"The datasheet and pinout for the XC3S5000-4FGG1156C are available from Xilinx (now AMD) as part of the Spartan-3 FPGA documentation. The part has 633 user I/O arranged in multiple banks with configurable Vccio levels. The FGG1156 package uses a 1.0 mm pitch BGA with 1156 balls."},{"question":"How many I/O pins does XC3S5000-4FGG1156C have and what are the voltage levels?","answer":"The XC3S5000-4FGG1156C provides 633 user I/O pins. The core operates at 1.14 V, while I/O banks can be independently set to 3.3 V, 2.5 V, 1.8 V, or 1.5 V depending on the Vccio supply connected to each bank."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/amd-xilinx/XC3S5000-4FGG1156C","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/amd-xilinx/XC3S5000-4FGG1156C when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-11T19:05:41.221Z","lastPublished":"2026-07-11T19:05:41.221Z","indexable":true}}