{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"STM32H745IGT6","brand":"STMicroelectronics","brandSlug":"stmicroelectronics","productSlug":"STM32H745IGT6","canonicalUrl":"https://icboms.com/stmicroelectronics/STM32H745IGT6","factsUrl":"https://icboms.com/api/mcp/products/STM32H745IGT6","rawCanonicalId":null},"summary":{"shortDescription":"STMicroelectronics STM32H7 series, STM32H745IGT6, 32-Bit Dual-Core ARM Cortex-M4/M7, 240MHz, 480MHz, 1MB Flash, 1M x 8 RAM, 176-LQFP, -40°C~85°C.","salesMarkdown":"## Dual-core architecture — what the speed split means for your design The STM32H745IGT6 pairs a Cortex-M4 core clocked at 240 MHz with a Cortex-M7 core at 480 MHz. That asymmetry is deliberate: the M7 handles heavy DSP or floating-point math while the M4 runs control logic, communication stacks, or safety monitoring. The 1 MB Flash and 1 MB RAM are matched, so neither core starves the other on code or data space. For a mixed-criticality system — say, a motor drive with real-time fieldbus — you partition the M4 for the safety loop and the M7 for the FOC algorithm without a second chip. ## Connectivity and I/O — gateway-class peripheral set With Ethernet, dual USB OTG, CANbus, and a full suite of serial interfaces (UART/USART, SPI, I²C, SAI, SPDIF, QSPI), this MCU is wired for industrial gateway, HMI, or edge-compute roles. The 119 I/O in a 176-LQFP package give enough headroom for parallel memory or display buses alongside the fieldbus ports. Supply range is 1.62 V to 3.6 V.","metaTitle":"ST STM32H745IGT6 ARM Cortex-M4/M7 MCU, 240/480 MHz, 1 MB Flash","metaDescription":"STMicroelectronics STM32H745IGT6 dual-core 32-bit MCU: Cortex-M4 at 240 MHz, M7 at 480 MHz, 1 MB Flash, 1 MB RAM, 176-LQFP. Active lifecycle, sourced to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"Mfr":"STMicroelectronics","Speed":"240MHz, 480MHz","Series":"STM32H7","Package":"Tray","RAM Size":"1M x 8","Core Size":"32-Bit Dual-Core","EEPROM Size":"-","Peripherals":"Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT","Connectivity":"CANbus, EBI/EMI, Ethernet, I²C, IrDA, LINbus, MDIO, MMC/SD/SDIO, QSPI, SAI, SPDIF, SPI, SWPMI, UART/USART, USB OTG","Mounting Type":"Surface Mount","Number of I/O":"119","Core Processor":"ARM® Cortex®-M4/M7","Package / Case":"176-LQFP","Product Status":"Active","Data Converters":"A/D 28x16b; D/A 2x12b","Oscillator Type":"Internal","lifecycle_stage":"eol_hot","Base Product Number":"STM32H745","Program Memory Size":"1MB (1M x 8)","Program Memory Type":"FLASH","Operating Temperature":"-40°C~85°C(TA)","Supplier Device Package":"176-LQFP (24x24)","Voltage - Supply (Vcc/Vdd)":"1.62V ~ 3.6V"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$16.1066","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/3e580cb8f9821c843028fa7c99733287.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/STM32H745IGT6/alternatives.json"},"ai":{"faq":[{"question":"What is the STM32H745IGT6's core speed?","answer":"The Cortex-M4 core runs at 240 MHz and the Cortex-M7 core at 480 MHz, giving a dual-speed asymmetric architecture for mixed control and DSP workloads."},{"question":"What compliance documentation does ST provide for the STM32H745IGT6?","answer":"STMicroelectronics provides RoHS and REACH compliance documentation for this part. The 176-LQFP package is lead-free and RoHS-compliant per ST's standard material declarations."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/stmicroelectronics/STM32H745IGT6","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/stmicroelectronics/STM32H745IGT6 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-16T10:39:33.080Z","lastPublished":"2026-07-16T10:39:33.080Z","indexable":true}}