{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"SPC5747GBK1VMJ6","brand":"NXP Semiconductors","brandSlug":"nxp","productSlug":"SPC5747GBK1VMJ6","canonicalUrl":"https://icboms.com/nxp/SPC5747GBK1VMJ6","factsUrl":"https://icboms.com/api/mcp/products/SPC5747GBK1VMJ6","rawCanonicalId":null},"summary":{"shortDescription":"NXP SPC5747GBK1VMJ6, MPC57xx series, 32-bit Tri-Core MCU, 4MB FLASH, 768K x 8 RAM, 80MHz/160MHz, 256-MAPPBGA (17x17), -40°C to 105°C.","salesMarkdown":"## Tri-core architecture and clock domains The SPC5747GBK1VMJ6 is a 32-bit Tri-Core microcontroller from the MPC57xx series, built around one e200z2 core clocked at 80 MHz and two e200z4 cores at 160 MHz. This asymmetric multiprocessing arrangement lets the slower core handle safety-monitoring and real-time housekeeping while the faster pair run the application logic and communications stack. ## Memory budget and program storage On-chip program memory is 4 MB of flash (4M x 8), paired with 768 KB of SRAM. The flash holds the firmware image and calibration data; the RAM budget must accommodate the AUTOSAR or safety stack, communication buffers, and the application heap. With 178 I/O lines, the device can drive parallel memory buses or a wide sensor array without external GPIO expanders. ## Connectivity and analog front-end The peripheral set includes CANbus, Ethernet, USB OTG, I²C, LINbus, SAI, and SPI — covering both automotive in-vehicle networks and industrial fieldbus interfaces. The analog subsystem provides 80 channels of 10-bit ADC and 64 channels of 12-bit ADC, enough to read multiple sensor inputs without external multiplexing.","metaTitle":"SPC5747GBK1VMJ6 MCU, MPC57xx, Tri-Core, 4MB Flash","metaDescription":"SPC5747GBK1VMJ6 MCU from the MPC57xx series: 32-bit Tri-Core, 4MB flash, 768KB RAM, 80/160 MHz, -40 to 105°C, 256-MAPPBGA. Active production, sourced to order.","metaKeywords":null},"attributes":{"series":"MPC57xx","packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"Speed":"80MHz/160MHz","Series":"MPC57xx","Package":"Bulk","RAM Size":"768K x 8","Core Size":"32-Bit Tri-Core","Peripherals":"DMA, LVD, POR, WDT","Connectivity":"CANbus, Ethernet, I²C, LINbus, SAI, SPI, USB, USB OTG","Mounting Type":"Surface Mount","Number of I/O":"178","Core Processor":"e200z2, e200z4, e200z4","Package / Case":"256-LBGA","Data Converters":"A/D 80x10b, 64x12b","Oscillator Type":"Internal","lifecycle_stage":"eol_hot","Program Memory Size":"4MB (4M x 8)","Program Memory Type":"FLASH","Operating Temperature":"-40°C ~ 105°C (TA)","Supplier Device Package":"256-MAPPBGA (17x17)","Voltage - Supply (Vcc/Vdd)":"3V ~ 5.5V"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$37.62","stockQuantity":0,"priceTiers":[{"qty":8,"price":"$37.62000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/4862b15020a3f81b34af57946628e637.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the core architecture and clock speed of SPC5747GBK1VMJ6?","answer":"The device uses a 32-bit Tri-Core architecture with one e200z2 core running at 80 MHz and two e200z4 cores at 160 MHz, providing separate domains for safety monitoring and application processing."},{"question":"What is the memory configuration of SPC5747GBK1VMJ6?","answer":"It has 4 MB of on-chip flash program memory and 768 KB of SRAM, sufficient for complex control firmware with safety stacks and communication buffers."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/nxp/SPC5747GBK1VMJ6","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/nxp/SPC5747GBK1VMJ6 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}