{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"SN74LVC74ANS","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"SN74LVC74ANS","canonicalUrl":"https://icboms.com/texas-instruments/SN74LVC74ANS","factsUrl":"https://icboms.com/api/mcp/products/SN74LVC74ANS","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments SN74LVC74ANS, 74LVC series, dual D-type flip-flop with set and reset, positive-edge triggered, complementary outputs, 100 MHz clock frequency, 1.65V–3.6V supply, 5.2 ns propagation delay at 3.3V/50pF, 14-SOIC package, -40°C to 125°C.","salesMarkdown":"## Dual D-type flip-flop with set and reset — 100 MHz, 1.65 V to 3.6 V The Texas Instruments SN74LVC74ANS is a dual positive-edge-triggered D-type flip-flop with individual set (preset) and reset inputs, complementary outputs, and a 100 MHz maximum clock frequency. It operates from 1.65 V to 3.6 V, making it suitable for 1.8 V and 3.3 V logic rails in mixed-voltage systems. Propagation delay is 5.2 ns at 3.3 V with a 50 pF load, which sets the timing margin for high-speed bus interfaces. The device is rated over the full industrial temperature range of -40°C to 125°C, covering motor-drive, outdoor telecom, and factory-automation environments. ## Output drive and quiescent current Each output can sink or source 24 mA, enough to drive multiple standard CMOS loads or a single TTL input without external buffers. Quiescent current is 10 µA typical, which keeps the static power contribution negligible in battery-powered or always-on subsystems. ## Package and footprint Housed in a 14-lead SOIC package (0.209\" body width, 5.30 mm), the SN74LVC74ANS uses the standard 14-SO footprint. The surface-mount package suits automated assembly and reflow processes. Input capacitance is 5 pF per pin, which helps maintain signal integrity on clock and data lines. ## Lifecycle and sourcing It is available through independent distribution and is quoted to order against an RFQ.","metaTitle":"SN74LVC74ANS D-Type Flip-Flop, 100 MHz, 1.65-3.6V","metaDescription":"TI SN74LVC74ANS dual D-type flip-flop with set/reset, 100 MHz clock, 5.2 ns prop delay at 3.3V. Request quote.","metaKeywords":null},"attributes":{"series":"74LVC","packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Analog & Data Acquisition"],"specifications":{"Type":"D-Type","Series":"74LVC","Package":"Bulk","Function":"Set(Preset) and Reset","Output Type":"Complementary","Trigger Type":"Positive Edge","Mounting Type":"Surface Mount","Package / Case":"14-SOIC (0.209\\\", 5.30mm Width)","Clock Frequency":"100 MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"1.65V ~ 3.6V","Input Capacitance":"5 pF","Number of Elements":"2","Operating Temperature":"-40°C ~ 125°C (TA)","Supplier Device Package":"14-SO","Current - Quiescent (Iq)":"10 µA","Current - Output High, Low":"24mA, 24mA","Number of Bits per Element":"1","Max Propagation Delay @ V, Max CL":"5.2ns @ 3.3V, 50pF"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$0.15","stockQuantity":0,"priceTiers":[{"qty":2061,"price":"$0.15000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/0164af57a9b1aec5405b6694f3c2adb8.pdf","sourceUrl":null},"ai":{"faq":[],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/SN74LVC74ANS","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/SN74LVC74ANS when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}