{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"SN74LS646SG","brand":"AMD (Xilinx)","brandSlug":"amd-xilinx","productSlug":"SN74LS646SG","canonicalUrl":"https://icboms.com/amd-xilinx/SN74LS646SG","factsUrl":"https://icboms.com/api/mcp/products/SN74LS646SG","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments SN74LS646SG, Registered Bus Transceiver, Non-Inverting, 3-State Output, 8-bit, 1 Element, Surface Mount, 24-SOIC (0.295\", 7.50mm Width), Bulk.","salesMarkdown":"## What this part is and where it fits The Texas Instruments SN74LS646SG is an 8-bit registered bus transceiver with non-inverting 3-state outputs, packaged in a 24-SOIC wide-body surface-mount package. It is designed for bidirectional asynchronous communication between two data buses, with internal registers that latch data on either the A or B port under control of the clock and enable pins. Typical applications include memory-mapped I/O interfaces, microprocessor bus buffering, and backplane data transfer in industrial control or telecom equipment where registered data flow and bus isolation are required. ## Registered transceiver — what the logic type means for the bus The registered architecture means data on the A or B port is clocked into an internal flip-flop before being driven to the opposite port. This eliminates the need for external latches in applications where data must be held stable across bus-turnaround cycles, such as in multiplexed address/data buses or when interfacing a slower peripheral to a faster processor bus. The non-inverting path preserves data polarity, so a logic high on the input appears as a logic high on the output — no inversion to account for in the firmware or logic design. ## 3-state outputs and bus sharing The 3-state output allows the transceiver to present a high-impedance state on the bus when the output enable is deasserted. This is essential for shared-bus topologies where multiple devices drive the same lines — only one transceiver drives the bus at a time, preventing contention and signal degradation. In a typical backplane or memory-mapped I/O system, the SN74LS646SG sits between the processor local bus and a peripheral bus, with the output enable controlled by the address decoder. ## Package and mounting — board-fit check The 24-SOIC wide-body package (0.295\" body width, 7.50 mm) is a standard surface-mount footprint. The supplier device package is listed as 24-SOIC. Mounting type is surface mount. Bulk packaging means parts are shipped in tubes or trays, not tape-and-reel.","metaTitle":"SN74LS646SG Registered Bus Transceiver, 3-State, 24-SOIC","metaDescription":"SN74LS646SG from Texas Instruments — 8-bit registered bus transceiver, non-inverting, 3-state outputs, 24-SOIC package. Active production, RoHS non-compliant. Sourced to order; RFQ","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"RoHS non-compliant","productStatus":"Active","categoryPath":["Analog & Data Acquisition"],"specifications":{"Package":"Bulk","Logic Type":"Transceiver, Non-Inverting","Output Type":"3-State","Mounting Type":"Surface Mount","Package / Case":"24-SOIC (0.295\\\", 7.50mm Width)","lifecycle_stage":"eol_hot","Number of Elements":"1","Supplier Device Package":"24-SOIC","Number of Bits per Element":"8"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$5.44","stockQuantity":0,"priceTiers":[{"qty":56,"price":"$5.44000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/a686f4e049efe7292894daa62ba9f108.pdf","sourceUrl":null},"ai":{"faq":[{"question":"Is SN74LS646SG RoHS compliant?","answer":"No, the SN74LS646SG is listed as RoHS non-compliant — it contains lead in the solder finish or other restricted materials. If your assembly process requires lead-free components, you will need to evaluate a different suffix variant within the 74LS646 family."},{"question":"What is the difference between SN74LS646SG and SN74LS646?","answer":"The SN74LS646SG is the surface-mount 24-SOIC wide-body variant of the 74LS646 registered bus transceiver. The base part number SN74LS646 without a suffix typically refers to the DIP (through-hole) package. The logic function, pinout, and electrical characteristics are the same; only the package and mounting method differ."},{"question":"What is the pinout of SN74LS646SG?","answer":"The pinout follows the standard 74LS646 registered transceiver layout for a 24-pin SOIC package. The A port occupies pins 2–9, the B port pins 11–18, with control pins (clock, output enable, direction) on pins 1, 10, 19, 20, 23, 24. Power (VCC) is pin 24, ground (GND) is pin 12. For a complete pinout diagram, refer to the SN74LS646 datasheet."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/amd-xilinx/SN74LS646SG","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/amd-xilinx/SN74LS646SG when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-11T19:44:22.378Z","lastPublished":"2026-07-11T19:44:22.378Z","indexable":true}}