{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"SN74AUP2G80YFPR","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"SN74AUP2G80YFPR","canonicalUrl":"https://icboms.com/texas-instruments/SN74AUP2G80YFPR","factsUrl":"https://icboms.com/api/mcp/products/SN74AUP2G80YFPR","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments 74AUP series D-type flip-flop, SN74AUP2G80YFPR, dual 1-bit, positive-edge triggered, inverted output, 257 MHz, 8-DSBGA, tape and reel.","salesMarkdown":"## 8-DSBGA footprint and board-level integration The SN74AUP2G80YFPR comes in an 8-XFBGA, DSBGA package (supplier device package 8-DSBGA) — a 0.5 mm pitch wafer-level chip-scale package that routes the two flip-flop channels into a 1.5 mm² footprint. The exposed solder balls demand a controlled stencil aperture and a micro-via-capable PCB stack-up; the narrow pitch rules out hand-assembly and makes X-ray inspection the standard for joint verification. Surface-mount only — no through-hole variant exists. The package is ROHS3 compliant, so the reflow profile follows the standard lead-free ramp-soak-peak curve for SAC305 solder. ## Clock speed and propagation delay budget Rated for a clock frequency of 257 MHz, this dual D-type flip-flop toggles at a rate that suits moderate-speed data pipelines and control logic in portable or battery-operated gear. The max propagation delay is 6.4 ns at 3.3 V with a 30 pF load — that delay sets the timing margin for the downstream capture flop; at 257 MHz the period is roughly 3.9 ns, so the 6.4 ns delay means the output transition completes well within one clock cycle at lower frequencies, but at the rated maximum the setup/hold window tightens and the load capacitance must stay at or below 30 pF to meet the datasheet limit. Positive-edge triggered with inverted output — the Q-bar output inverts the D input on each rising clock edge. The dual-element configuration packs two independent 1-bit flip-flops into one package, each with its own D, clock, and Q-bar pins. ## Supply range and quiescent draw for battery duty Operates from 0.8 V to 3.6 V — the 0.8 V floor lets it run directly from a near-depleted single-cell lithium primary or a 0.9 V alkaline cell, while the 3.6 V ceiling covers the full Li-ion range. Quiescent current is 500 nA typical, so the flip-flop's own draw is negligible in a system that spends most of its time in sleep mode — a sensor node waking once per second to latch a reading burns more current in the MCU's RTC than in this flop. Output drive is 4 mA source and 4 mA sink at 3.3 V — enough to switch a CMOS gate input or a low-power LED indicator, but not a relay coil or a long PCB trace without a buffer. Input capacitance is 1.5 pF, keeping the clock-line load light even with both flip-flops driven from the same source. ## Temperature grade and deployment context Rated for -40°C to 85°C ambient — the industrial temperature band covers outdoor telecom cabinets, factory-floor sensor interfaces, and automotive cabin electronics (non-engine-bay). The 74AUP series is TI's ultra-low-power logic family, positioned below the 74AUC and 74AVC families in dynamic power; the trade-off is lower output drive and slightly higher propagation delay compared to the faster families, but for a battery-powered edge where every nanoamp counts, the 74AUP is the right choice. ## Lifecycle and sourcing posture No pin-compatible second-source or official successor is recorded — the part is a single-source item from TI.","metaTitle":"SN74AUP2G80YFPR Texas Instruments 74AUP D-Type Flip-Flop","metaDescription":"Texas Instruments SN74AUP2G80YFPR dual D-type flip-flop, 74AUP series, 0.8V-3.6V supply, 500 nA quiescent, 257 MHz clock, 8-DSBGA. Active, ROHS3.","metaKeywords":null},"attributes":{"series":"74AUP","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Discrete Semiconductors"],"specifications":{"Type":"D-Type","Series":"74AUP","Package":"Tape & Reel (TR); Cut Tape (CT)","Function":"Standard","Output Type":"Inverted","Trigger Type":"Positive Edge","Mounting Type":"Surface Mount","Package / Case":"8-XFBGA, DSBGA","Clock Frequency":"257 MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"0.8V ~ 3.6V","Input Capacitance":"1.5 pF","Number of Elements":"2","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"8-DSBGA","Current - Quiescent (Iq)":"500 nA","Current - Output High, Low":"4mA, 4mA","Number of Bits per Element":"1","Max Propagation Delay @ V, Max CL":"6.4ns @ 3.3V, 30pF"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$0.95","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$0.95000","currency":"USD"},{"qty":10,"price":"$0.83600","currency":"USD"},{"qty":25,"price":"$0.78520","currency":"USD"},{"qty":100,"price":"$0.64100","currency":"USD"},{"qty":250,"price":"$0.59536","currency":"USD"},{"qty":500,"price":"$0.50668","currency":"USD"},{"qty":1000,"price":"$0.40534","currency":"USD"},{"qty":3000,"price":"$0.36734","currency":"USD"},{"qty":6000,"price":"$0.35850","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/943ae216b9f69ccb5ed50466c51f5ede.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the clock frequency and propagation delay of SN74AUP2G80YFPR?","answer":"The SN74AUP2G80YFPR is rated for a clock frequency of 257 MHz with a maximum propagation delay of 6.4 ns at 3.3 V with a 30 pF load. The 6.4 ns delay sets the timing margin for the downstream capture flop — at the rated 257 MHz clock period of ~3.9 ns, the load capacitance must stay at or below 30 pF to meet the datasheet limit."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/SN74AUP2G80YFPR","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/SN74AUP2G80YFPR when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-22T19:45:10.375Z","lastPublished":"2026-07-22T19:45:10.375Z","indexable":true}}